<div class="content-intro"><p><span data-contrast="none">Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. </span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559685":0,"335559737":240,"335559738":240,"335559739":240,"335559740":279}"> </span></p> <p>Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. <a href="https://openai.com/index/cerebras-partnership/">OpenAI recently announced a multi-year partnership with Cerebras</a>, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. </p> <p>Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.</p></div><p class="p1"><strong>Role Summary:</strong></p> <p class="p2">We are looking for a hands-on DVT Engineer to execute Design Validation Test (DVT) at both the board/subassembly level and the system level, working closely with a Principal DVT Technical Lead. You will help build repeatable test setups, execute validation plans, debug failures, and drive issues to closure with cross-functional design teams. The work spans high-power power-delivery hardware, high-speed I/O, and complex electro-mechanical systems (thermal/cooling/optics interfaces).</p> <p class="p3"><strong>What You’ll Work On:</strong></p> <p class="p4"><strong>Board / Subassembly DVT</strong></p> <ul class="ul1"> <li class="li5">Execute bring-up and validation for complex PCBAs and subassemblies using documented test plans and procedures.</li> <li class="li5">Validate power-up/down sequences and power delivery behavior, including DC IR drop and AC noise/ripple characterization and rail margining.</li> <li class="li5">Validate clocking and high-speed I/O links at the board and interconnect level (connectors/cables), and assist with SI-related debug.</li> <li class="li5">Validate low-speed management interfaces (e.g., I2C/SPI/USB) and contribute to debugging intermittent/systemic failures.</li> <li class="li5">Run stress testing (extended runtime, temperature cycling) and document results with clear pass/fail and anomaly notes.</li> </ul> <p class="p4"><strong>System-Level DVT</strong></p> <ul class="ul1"> <li class="li5">Support DVT execution in lab and chamber environments, including setup, instrumentation, and day-to-day test operations.</li> <li class="li5">Execute and triage system-level test failures; gather data, isolate suspects, and work with the Principal DVT Lead to drive RCAs.</li> <li class="li5">Support validation that spans electrical + mechanical + thermal interactions (e.g., cooling loop behavior, thermal limits, optics/power interactions).</li> <li class="li2">Assist with integrating diagnostics/software hooks into DVT workflows (logging, scripts, data capture) to improve throughput and repeatability.</li> </ul> <p class="p3"><strong>Key Responsibilities:</strong></p> <p class="p4"><strong>Test Execution & Lab Ownership</strong></p> <ul class="ul1"> <li class="li5">Build and maintain benchtop and rack-level test setups (instrumentation, cabling, fixtures) to enable repeatable validation runs.</li> <li class="li5">Execute unit, subassembly, and system tests; capture data and logs; summarize results in concise reports and bug write-ups.</li> <li class="li5">Operate lab instruments (oscilloscopes, logic analyzers, power supplies/analyzers, DC electronic loads) safely and effectively.</li> <li class="li5">Maintain good test hygiene: calibration awareness, configuration control, and clear labeling/documentation of setups.</li> </ul> <p class="p4"><strong>Debug & Root-Cause Support</strong></p> <ul class="ul1"> <li class="li5">Perform structured triage and fault isolation on hardware issues found during DVT; reproduce, reduce, and characterize failure modes.</li> <li class="li5">Work with EE/ME/FW/Diagnostics teams to close issues; verify fixes through re-test and data comparison.</li> <li class="li5">Contribute to improving test coverage by identifying missing checks and proposing instrumentation/DFT improvements.</li> </ul> <p class="p4"><strong>Automation & Data</strong></p> <ul class="ul1"> <li class="li5">Use scripting (Python or similar) to automate test steps and data collection where appropriate.</li> <li class="li2">Help improve logging, result parsing, and reporting so DVT results are easy to interpret and compare across builds.</li> </ul> <p class="p1"><strong>Minimum Qualifications:</strong></p> <ul class="ul1"> <li class="li5">BS (or MS) in Electrical Engineering, Computer Engineering, or equivalent practical experience.</li> <li class="li5">3–8+ years of hands-on hardware validation / DVT / bring-up experience on complex boards and/or systems.</li> <li class="li5">Experience validating power delivery behavior (sequencing, margining, droop/ripple/noise) and debugging related failures.</li> <li class="li5">Experience with high-speed I/O bring-up/validation (PCIe/Ethernet-class links) and methodical debug practices.</li> <li class="li5">Strong lab skills with standard measurement equipment (scopes, DMMs, power supplies/analyzers, DC electronic loads).</li> <li class="li2">Clear written communication for test plans/procedures, results reporting, and bug/issue documentation.</li> </ul> <p class="p1"><strong>Preferred / Nice-to-Have</strong></p> <ul class="ul1"> <li class="li5">Experience with modular/rack-level or liquid-cooled systems and validation in environmental chambers.</li> <li class="li5">Experience collaborating with diagnostics/software teams to integrate test automation and logging into validation workflows.</li> <li class="li5">Familiarity with compliance or pre-compliance support (e.g., assisting with test readiness and data capture).</li> <li class="li2">Comfort working across electrical + mechanical boundaries (thermal constraints, cooling loop behaviors, optics or interconnect considerations).</li> </ul> <p class="p1"><strong>What Success Looks Like</strong></p> <ul class="ul1"> <li class="li5">DVT executions are repeatable and well-documented; regressions are easy to detect and compare across builds.</li> <li class="li5">Failures are triaged quickly with high-quality data capture, enabling fast RCAs and verified fixes.</li> <li class="li5">Test coverage improves over time through continuous additions of missing checks and automation.</li> </ul> <p><strong><span data-contrast="none">Location</span></strong><span data-ccp-props="{"335557856":16777215,"335559739":60}"> :</span><span data-contrast="none">Sunnyvale, California</span></p> <p><span data-ccp-props="{"335557856":16777215,"335559739":60}">The base salary range for this position is $150,000 to $250,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.</span></p> <p><span data-ccp-props="{}"> </span></p><div class="content-conclusion"><h4><strong>Why Join Cerebras</strong></h4> <p>People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:</p> <ol> <li>Build a breakthrough AI platform beyond the constraints of the GPU.</li> <li>Publish and open source their cutting-edge AI research.</li> <li>Work on one of the fastest AI supercomputers in the world.</li> <li>Enjoy job stability with startup vitality.</li> <li>Our simple, non-corporate work culture that respects individual beliefs.</li> </ol> <p>Read our blog: <a href="https://www.cerebras.net/blog/5-reasons-to-join-cerebras" target="_blank" data-auth="NotApplicable" data-linkindex="0">Five Reasons to Join Cerebras in 2026.</a></p> <h4>Apply today and become part of the forefront of groundbreaking advancements in AI!</h4> <hr> <p><em>Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. </em><em>We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. </em><em>We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.</em></p> <hr> <p><em>This website or its third-party tools process personal data. For more details, click <a href="https://www.cerebras.net/privacy/" target="_blank">here</a> to review our CCPA disclosure notice.</em></p></div>