<div class="content-intro"><p style="text-align: left;"><span style="font-size: 12pt;">SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. At the core of SambaNova's technology is the RDU (Reconfigurable Dataflow Unit) — a chip built on a dataflow architecture rather than the traditional GPU model. Its decode performance is especially strong for agentic workloads like multi-turn agents, code generation, and long-running applications. RDUs are packaged into SambaRack, rack-scale hardware that lets customers deploy state-of-the-art models with better performance, greater energy efficiency, and faster time to value.</span></p></div><h3><strong>About the team</strong></h3> <p>The emulation team builds the pre-silicon model of SambaNova's RDU that the software, architecture, and verification teams depend on.</p> <h3><strong>About the role</strong></h3> <p>SambaNova is looking for a Senior Principal Engineer to build and own the hardware emulation models for our next-generation Reconfigurable Dataflow Unit — the silicon behind our AI workload acceleration systems.</p> <p>Emulation is a development platform here, not a checkbox. Our software teams bring up drivers, runtime, and compiler against the emulation model months before silicon. Our architects measure performance on it. Our verification team runs on it to get through scenarios that simulation cannot reach in useful time. When the model is fast, accurate, and available, three organizations move faster; when it is not, they wait.</p> <p>Building that model is the core of the job. You will work shoulder to shoulder with the RTL design team to keep the design emulation-compliant, decide where a vendor model will do and where you need to write a custom one, and own the automation that keeps the platform running tests continuously rather than by hand. This is a senior individual-contributor role, and much of its leverage comes through other teams: you will be the person design, verification, and software engineers consult on what emulation can and should do, and the one who holds our emulator vendors to account.</p> <div class="flex-1 flex flex-col px-4 max-w-3xl mx-auto w-full pt-1" data-testid="transcript-list"> <div data-perf-region="transcript" data-find-provider-scope=""> <div data-sizer-excess="0" data-rocksteady-sizer="" data-testid="transcript-sizer"> <div data-rs-index="67" data-index="67" data-testid="transcript-row" data-last-message="true"> <div class="rounded-lg focus-visible:shadow-focus focus-visible:outline-hidden"> <div data-test-render-count="1"> <div class="group group/message-row"> <div class="group relative relative pb-[var(--msg-assistant-pb,0.75rem)]" data-is-streaming="false"> <div class="font-claude-response relative leading-[1.65rem] [&_pre>div]:bg-bg-000/50 [&_pre>div]:border-0.5 [&_pre>div]:border-border-400 [&_.ignore-pre-bg>div]:bg-transparent [&_.standard-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.standard-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8 [&_.progressive-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.progressive-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8"> <div class="grid grid-rows-[auto_auto] min-w-0"> <div class="row-start-2 col-start-1 relative grid grid-rows-[auto_auto] isolate min-w-0"> <div class="row-start-1 col-start-1 relative z-[2] min-w-0"> <div class="standard-markdown grid-cols-1 grid [&_>_*]:min-w-0 gap-3 [&_>_*:last-child]:mb-0 print:block print:[&_>_:where(:not(:first-child))]:mt-3 standard-markdown"> <h3 class="font-claude-response-body break-words whitespace-normal"><strong>Responsibilities</strong></h3> <p class="font-claude-response-body break-words whitespace-normal"><strong>Build the models</strong></p> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li class="font-claude-response-body whitespace-normal break-words pl-2">Develop the emulation model for each new RDU generation: high-performance transactors, behavioral models, and memory models in SystemVerilog and C/C++</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Partner with the RTL design team to keep the design emulation-compliant: review RTL and IP for constructs that will not map cleanly to the emulator, and close the gaps by substituting vendor emulation models or hand-coding custom models where no vendor model exists</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Own model fidelity: make sure substituted and custom models track design intent closely enough that software, performance, and verification results can be trusted</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Influence design decisions upstream so emulation-readiness is designed in rather than worked around</li> </ul> <p class="font-claude-response-body break-words whitespace-normal"><strong>Own the platform, flows, and automation</strong></p> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li class="font-claude-response-body whitespace-normal break-words pl-2">Own the emulation environment architecture: build and runtime flows, partitioning, compile strategy, clocking, and memory configuration for each chip generation</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Build and own the workflows that automate emulation testing on the hardware: job scheduling, regression launch, failure triage, and results reporting, so the platform runs continuously without manual babysitting</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Own throughput and capacity: profile and remove bottlenecks in models, transactors, and testbench collateral so turnaround stays fast as the design grows</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Own the emulator vendor relationship: drive blocking tool issues to resolution, hold the vendor accountable to our program schedule, and advise on platform selection and capacity investment</li> </ul> <p class="font-claude-response-body break-words whitespace-normal"><strong>Serve the three primary use cases</strong></p> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li class="font-claude-response-body whitespace-normal break-words pl-2">Software and hardware co-development: deliver and sustain the platform software teams depend on for pre-silicon bring-up of drivers, runtime, and compiler, and debug hardware/software integration failures alongside them</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Performance verification: enable workload bring-up, measurement methodology, and reproducible results, and work with architecture to correlate emulated performance against architectural models</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Verification acceleration: partner with design verification to move long-running and full-chip regressions onto emulation reliably, including system-level and gate-level scenarios that are impractical in simulation</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Silicon debug, secondary to the above: reproduce post-silicon issues on emulation when lab debug needs a controllable, fully visible model</li> </ul> <p class="font-claude-response-body break-words whitespace-normal"><strong>Technical Leadership</strong></p> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li class="font-claude-response-body whitespace-normal break-words pl-2">Own the emulation methodology and mentor engineers on it, and act as the authority design, verification, and software teams consult when deciding what belongs on emulation</li> </ul> <h3 class="font-claude-response-body break-words whitespace-normal"><strong>Required Qualifications</strong></h3> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li class="font-claude-response-body whitespace-normal break-words pl-2">B.S. in Electrical Engineering, Computer Engineering, or Related Field</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">10+ years of professional experience, including deep hands-on emulation work</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Hands-on expertise bringing up and sustaining designs on an industry-standard emulation platform such as Palladium, Veloce, or Zebu: compile flows, partitioning, debug capabilities, and performance tuning</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Strong SystemVerilog together with C/C++, applied to building transactors, behavioral models, memory models, and co-emulation infrastructure</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Experience making a design emulation-ready: identifying RTL and IP that will not map to the emulator, and resolving it by substituting vendor emulation models or coding custom models</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Track record owning an emulation platform across at least one full chip program, from bring-up through tape-out, including enabling software teams to run a real stack against the pre-silicon model</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Track record owning an emulator vendor relationship: driving blocking tool issues to resolution and evaluating and landing new platform capabilities</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Experience applying emulation to performance analysis, to accelerating functional verification regressions, or both</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Deep debug ability across the hardware/software boundary: able to localize a failure that could be RTL, model, transactor, flow, or software</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Scripting and automation in Python and shell: building the regression, scheduling, and triage workflows that keep an emulation platform continuously utilized</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Demonstrated technical leadership without formal authority: setting methodology direction across design, verification, and software teams</li> </ul> <h3 class="font-claude-response-body break-words whitespace-normal"><strong>Preferred Qualifications</strong></h3> <ul class="[li_&]:mb-0 [li_&]:mt-1 [li_&]:gap-1 [&:not(:last-child)_ul]:pb-1 [&:not(:last-child)_ol]:pb-1 list-disc flex flex-col gap-1 pl-8 mb-3 print:block print:space-y-1"> <li>M.S. or PHD in Electrical Engineering, Computer Engineering, or Related Field</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Depth on Cadence Palladium</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Hands-on experience on more than one emulation platform, with judgment about the trade-offs between them</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Machine learning accelerators, dataflow architectures, or reconfigurable silicon</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">High-speed interconnect and memory modeling: PCIe, Ethernet, HBM/DDR</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Virtual or hybrid platforms combining emulation with instruction-accurate models</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">FPGA prototyping platforms and design partitioning for prototyping</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Post-silicon debug, reproducing lab failures on a pre-silicon platform</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Compiler or runtime software background, or experience embedded on a software team</li> <li class="font-claude-response-body whitespace-normal break-words pl-2">Fluency with Claude or other AI tools applied to flow development and automation</li> </ul> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div><div class="content-pay-transparency"><div class="pay-input"><div class="description"><p>Base Salary Range:</p></div><div class="title">Base Pay Range</div><div class="pay-range"><span>$210,000</span><span class="divider">—</span><span>$280,000 USD</span></div></div></div><div class="content-conclusion"><p><strong><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Submission Guidelines<br></span></strong><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified. </span></p> <p><strong><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">EEO Policy<br></span></strong><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.</span></p> <p style="text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;"><strong>Benefits Summary for US-Based, Full-Time Employment Positions</strong><br>SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.</span></p></div>